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Reda, S., A. N. Nowroz, R. Cochran, and S. Angelevski, "Post-silicon power mapping techniques for integrated circuits", Integr. VLSI J., vol. 46, no. 1, Amsterdam, The Netherlands, The Netherlands, Elsevier Science Publishers B. V., pp. 69–79, jan, 2013.
Hankendi, C., and S. Reda, "Cap: Adaptive Power Capping for Virtualized Servers", International Symposium on Low-Power Electronics and Design, 2013.
Dev, K., A. N. Nowroz, and S. Reda, "Power Mapping and Modeling of Multi-core Processors", International Symposium on Low-Power Electronics and Design, 2013.
Cochran, R., and S. Reda, "Thermal prediction and adaptive control through workload phase detection", ACM Trans. Des. Autom. Electron. Syst., vol. 18, no. 1, New York, NY, USA, ACM, pp. 7:1–7:19, 2013.
Khanal, S., H. F. Silverman, and R. R. Shakya, "A Free-Source Method (FrSM) for Calibrating a Large-Aperture Microphone Array", Audio, Speech, and Language Processing, IEEE Transactions on, vol. 21, no. 8, pp. 1632-1639, 2013.
Dworak, J., K. Nepal, N. Alves, Y. Shi, N. Imbriglia, and I. R. Bahar, "Using Implications to Choose Tests Through Suspect Fault Identification", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 18, no. 1, pp. 14:1-14:19, 2013.
Ferri, C., D. Papagiannopoulou, A. Calimera, and I. R. Bahar, "NBTI-Aware Data Allocation Strategies for Scratchpad Based Embedded Systems", Springer Journal of Electronic Testing: Theory and Applications (JETTA), vol. 28, no. 3, pp. 349-363, May/June, 2012.
Jannaty, P., F. C. Sabou, S. T. Le, M. Donato, I. R. Bahar, W. Patterson, J. Mundy, and A. Zaslavsky, "Shot-Noise-Induced Failure in Nanoscale Flip-Flops", IEEE Transactions on Electron Devices, vol. 59, no. 3, pp. 800-806, March, 2012.
Nowroz, A. N., G. Woods, and S. Reda, "Power Mapping of Integrated Circuits Using AC-Based Thermography", Very Large Scale Integration (VLSI) Systems, IEEE Transactions on: IEEE, 2012.
Nepal, K., O. Ulusel, I. R. Bahar, and S. Reda, "Fast Multi-Objective Algorithmic Design Co-Exploration for FPGA-based Accelerators", Proceedings of the 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, Washington, DC, USA, IEEE Computer Society, pp. 65–68, 2012.
Reda, S., and A. N. Nowroz, "Power Modeling and Characterization of Computing Devices: A Survey", Found. Trends Electron. Des. Autom., vol. 6, no. 2, Hanover, MA, USA, Now Publishers Inc., pp. 121–216, 2012.
Alves, N., Y. Shi, J. Dworak, I. R. Bahar, and K. Nepal, "Enhancing online error detection through area-efficient multi-site implications", VLSI Test Symposium (VTS), 2011 IEEE 29th, pp. 241 -246, May, 2011.
Jannaty, P., F. C. Sabou, I. R. Bahar, J. Mundy, W. Patterson, and A. Zaslavsky, "Full Two-Dimensional Markov Chain Analysis of Thermal Soft Errors in Subthreshold Nanoscale CMOS Devices", IEEE Transactions on Device and Materials Reliability, vol. 11, no. 1, pp. 50-59, March, 2011.
Cochran, R., C. Hankendi, A. Coskun, and S. Reda, "Identifying the optimal energy-efficient operating points of parallel workloads", Proceedings of the International Conference on Computer-Aided Design (ICCAD) , San Jose, California, IEEE Press, 2011.
Nowroz, A. N., G. Woods, and S. Reda, "Improved post-silicon power modeling using AC lock-in techniques", Proceedings of the 48th Design Automation Conference, New York, NY, USA, ACM, pp. 101–106, 2011.
Reda, S., R. Cochran, and A. N. Nowroz, "Improved Thermal Tracking for Processors Using Hard and Soft Sensor Allocation Techniques", IEEE Trans. Comput., vol. 60, no. 6, Washington, DC, USA, IEEE Computer Society, pp. 841–851, 2011.