Techniques for Built-in Self-Repair in 3D Die Stacks Using Programmable Logic

 

3D stacked integrated circuits (ICs) hold much promise for increasing system performance.  However, they are also difficult to test and assemble, leading to yield issues.  This project investigates the use of unused (or underused) resources within the 3D stack to replace defective portions of a die.  In particular, we are exploring techniques for error detection, different levels of granularity for replacement, and optimal use of reconfigurable logic to repair the errors.  This work is currently supported by NSF.

Current People Involved:

- R. Iris Bahar
Jennifer Dworak (SMU)
- Kundan Nepal (Univ. of St. Thomas)