Laboratory and Homework Assignments

 

9/6/2016: Lab 0: Cadence Virtuoso Schematic Design and Circuit Simulation Tutorial, due Wednesday, September 21, 2016.

Please note that this tutorial will not be graded. However, you will need to email your final inverter layout design to Marc to show you have completed it. To export the layout, you will need to do the following:
From the main Vituoso window, go to File > Export > Stream ... and fill in the settings as follows:

Stream File: <Name>_<Assignment#>.gds
Technology File: NCSU_CellLib_FreePDK45
Library: <YourLibrary>
Top Level Cell(s): <Cell name to be exported>
View(s) layout

This will generate 2 files: a .gds and a .txt file. You will have to email both files to the TA together with the name of the Top Level Cell.

New to Cadence and/or CCV? If you haven't used Cadence on the CCV machines before, please read this TUTORIAL about logging on to the CCV machines and running the Cadence tools.


9/21/2016: Lab 1: Simple Gate Cell Design with Cadence, due Wednesday, September 28, 2016

Hand in during class, plus place all relevant files with layout and simulation results in a directory called <Name>_Lab1> for Marc to look over. Instructions for creating a new library and moving a library you already created can be found in the Library Creation Tutorial.


10/2/2014: Lab 2: More Cell Design with Cadence and Propagation Delay Estimation, due Friday, October 7, 2016 (hand in by 5pm).

(put layout and simulation files in your data directory).


10/13/2016: Lab 3: Elmore Delay, Logical Effort, and Domino Logic Cell Design, due Friday, October 21, 2016 (hand in by 5pm).

(put layout and simulation files in your data directory).


11/2/2016: Lab 4: Flip-Flop Design and Dual-Vdd Design, due Friday, November 11, 2016 (hand in by 5pm).

(Sput layout and simulation files in your data directory).


11/16/2016: Final Project: Design, Simulation, and Layout of a Complex VLSI Circuit

Wednesday, November 23: Project Proposal due by 12pm (one per group)

Wednesday, December 3: Status Report due by 5pm (one per group)

Saturday, December 13: Project Presentations, 9am-noon

Monday, December 15: Final Reports due by 5pm (one per group)

 

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