| Week | Lecture | Date | Slides | Reading |
|---|---|---|---|---|
| 1 | Lecture 1 | Sept. 7, 2016 | Introduction | none |
| 2 | Lecture 2, 3 | Sept. 12, 14, 2016 | The MOS transistor, fabrication & layout | Chap. 1, section 1.3-1.5, Chap. 2, Chap. 3, section 3.1-3.3 |
| 3 | Lecture 4, 5 | Sept. 19, 21, 2016 | MOSFET Operation and Static CMOS | Chap. 2 |
| 4 | Lecture 6, 7 | Sept. 26, 28, 2016 | MOSFET Resistance and Capacitance and Their Impact on Gate Performance | Chap. 2, section 3, Chap. 4, section 4.3-4.5 |
| 5 | Lecture 8, 9 | Oct. 3, 5, 2016 | Sizing and Layout of Complex CMOS Gates | Chap. 4, section 4.3-4.5, Chap. 1, section 1.5.5 |
| 6 | Lecture 10 | Oct. 12, 2016 | Improving the Performance of Complex CMOS Gates | Chap. 4, section 4.4-4.5 |
| 7 | Lecture 11, 12 | Oct. 17, 19, 2016 | Logical Effort and Introduction to Dynamic Logic | Chap. 9, section 9.2 |
| 8 | Lecture 13 | Oct. 24, 2016 | Static Latch and Flip-Flop Design | Chap. 10, section 10.1-10.3 |
| 9 | Lecture 14, 15 | Oct. 31, Nov. 2, 2016 | Static & Dynamic Latch/FF Design | Chap. 4, section 4.3-4.5, Chap. 1, section 1.5.5 |
| 10 | Lecture 16, 17 | Nov. 7, 9, 2016 | Memory Organization, SRAMs & DRAMs | Chap. 12, section 12.3, 12.3, 12.4, 12.6 |
| 11 | Lecture 18, 19 | Nov. 14, 16, 2016 | Memory Address Decoders and Introduction to Adder Logic | Chap. 12, section 12.2, Chapter 11, section 11.1, 11.2 |
| 12 | Lecture 20, 21 | Nov. 21, 23, 2016 | Multiplication and Power Dissipation | Chap. 11, section 11.9, Chap. 2, sec, 2.4.3, 2.4.4, Chap. 5, sec. 5.3 |
| 13 | Lecture 22 | Nov. 28, 2016 | Datapath Logic | Chap. 11, section 11.8, 11.9, Chap. 1, sec, 1.10 |
| 14 | Lecture 23 | Dec. 5, 2016 | Reducing Leakage Power & Alternatives to Bulk CMOS processes |